AMD 10h

Results: 107



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11PassMark - CPU Benchmarks - List of Benchmarked CPUs Shopping cart |  Home

PassMark - CPU Benchmarks - List of Benchmarked CPUs Shopping cart | Home

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Source URL: www.lumii.lv

Language: English - Date: 2015-03-13 10:17:44
12Modeling and Characterizing Power Variability in Multicore Architectures Ke Meng Frank Huebbers  Russ Joseph

Modeling and Characterizing Power Variability in Multicore Architectures Ke Meng Frank Huebbers Russ Joseph

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Source URL: users.eecs.northwestern.edu

Language: English - Date: 2008-12-17 09:58:48
13Optimizing Software Data Prefetches with Rotating Registers  Gautam Doshi Intel Corporation 2200, Mission College Blvd Santa Clara, CA 95052

Optimizing Software Data Prefetches with Rotating Registers Gautam Doshi Intel Corporation 2200, Mission College Blvd Santa Clara, CA 95052

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Source URL: research.ac.upc.edu

Language: English - Date: 2002-03-20 08:48:06
14Reactive-Associative Caches Brannon Batson Alpha Design Group Compaq Computer Corporation

Reactive-Associative Caches Brannon Batson Alpha Design Group Compaq Computer Corporation

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Source URL: research.ac.upc.edu

Language: English - Date: 2002-03-20 08:47:53
15F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide

F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide

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Source URL: eprint.iacr.org

Language: English - Date: 2014-07-04 21:30:09
16DARCO: Infrastructure for Research on HW/SW co-designed Virtual Machines Demos Pavlou‡,1, Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert,

DARCO: Infrastructure for Research on HW/SW co-designed Virtual Machines Demos Pavlou‡,1, Aleksandar Brankovic, Kyriakos Stavrou, Enric Gibert,

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Source URL: amas-bt.ece.utexas.edu

Language: English - Date: 1980-01-01 01:00:00
17F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide

F LUSH +R ELOAD: a High Resolution, Low Noise, L3 Cache Side-Channel Attack Yuval Yarom Katrina Falkner The University of Adelaide

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Source URL: eprint.iacr.org

Language: English - Date: 2014-07-04 21:30:09
18Enabling today. Inspiring tomorrow. Pioneering A Better World CORPORATE RESPONSIBILITY SUMMARY

Enabling today. Inspiring tomorrow. Pioneering A Better World CORPORATE RESPONSIBILITY SUMMARY

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Source URL: www.amd.com

Language: English - Date: 2014-08-20 15:12:33
19FPGA Implementation of a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pne

FPGA Implementation of a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Kalokerinos, Vassilis Papaefstathiou, George Nikiforos, Stamatis Kavadias, Manolis Katevenis, Dionisios Pne

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Source URL: www.ics.forth.gr

Language: English - Date: 2013-12-23 07:16:59
20A run-time Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Nikiforos, George Kalokairinos, Vassilis Papaefstathiou, Stamatis Kavadias, Dionisis Pnevmatikatos and Manolis Katevenis

A run-time Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability George Nikiforos, George Kalokairinos, Vassilis Papaefstathiou, Stamatis Kavadias, Dionisis Pnevmatikatos and Manolis Katevenis

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Source URL: www.ics.forth.gr

Language: English - Date: 2013-12-23 07:16:59